The present invention relates to the determination of connectivity faults in communication systems, especially between chips at opposite ends of a transmission link.
Connectivity faults are of several types including “stuck-at” faults in which a transmitted signal appears stuck at either a low state or a high state and fails to transition between states. Other types of connectivity faults include those in which a coupling capacitor used for alternating current (AC) mode operation is shorted, and those in which the arriving signal appears to “float”, such as when the cable is disconnected from the signal source. Elements which provide connectivity between chips at remote and near ends of a transmission link include at least a transmitter of the chip at the remote end, the package of the chip at the remote end, a card connecting the remote end chip to the chip at the near end, an AC coupling capacitor, the package of the near-end chip, and a receiver implemented on the near-end chip. Connectivity between chips of such system is frequently referred to as “cable connectivity”, whether or not a literal cable (rather than a card or other conductive connection) is provided between the packages of respective chips. One way to test the cable connectivity is to send a stream of test data from a remote transmitter and then verify the data received at the near-end receiver.
In AC coupled transmission links, termination is provided at the source (transmitter side) such that no DC current is sunk at the receiver end. In such AC coupling mode, a high-pass filter exists by the combination of the series AC coupling capacitor (also referred to as a “DC blocking capacitor”) and a termination resistor which is shunted to ground. The high-pass filter causes low-frequency test signals to decay with an “RC” time constant determined by the magnitude of the resistance (R) and the capacitance (C) of the respective circuit elements, which can be fixed or variable.
Differential signal transmission is frequently favored for the transmission of higher frequency RF signals over signal conductors. An advantage of differential signal transmission is larger peak-to-peak differential signal swing and improved common mode noise rejection. However, differential signal transmission poses particular challenges. Heretofore, robust systems have not been provided for detecting and isolating a single-ended connectivity failure of a differential signal transmission link. For differential signal transmission links, it is not sufficient to detect the presence and/or absence of signals on a pair of signal conductors, a robust cable fault detector must determine which of two cables carrying the paired differential signals is faulty. The challenges of testing are particularly great when detecting a failing signal conductor when communication between chips is provided in an AC coupling mode in which signals must pass through an AC coupling capacitor, because such capacitor blocks direct current (DC) transmission. While some techniques such as AGC (adjusted gain control), DFE (decision feed-back equalization), etc., are available to reconstruct received signals, such techniques are of no use when signals are suddenly ruined by signal interference, or accidental disconnection of a cable from one or two ends of the transmission link.
Conventional signal detectors operate by detecting the absence of a valid signal within a specified latency. However, a signal detector cannot determine whether the failure is due to the cable, or the data itself. Neither can it tell which cable has a problem, or what type of defect mechanism is present, i.e., whether the fault is one of stuck-at high, stuck-at low or floating. This is because such signal detectors detect the presence of absence of signal from the difference between levels of a pair of differential signals arriving from the transmission link.
It would be desirable, as has been mandated by the 1149.6 standard of the Institute of Electrical and Electronics Engineers (IEEE) entitled “IEEE Standard for Boundary-Scan Testing of Advanced Digital Networks”, published April, 2003 (hereinafter IEEE 1149.6), to provide a cable fault detector at a receiver end of a transmission link, which detects single-ended cable faults for both AC and DC coupling modes.
In addition, it is often desirable to discharge conductors of coaxial cables prior to inserting them into a coaxial connector. Semiconductor devices on an integrated circuit chip are susceptible to damage from electrostatic discharge (ESD). As device sizes are progressively shrunk, proper ESD protection is increasingly necessary to avoid catastrophic failure, or degradation in reliability. Cable ESD has become a serious issue. To avoid such damage, a user can manually discharge a cable by grounding it to the instrument chassis before fastening it to the connector while the IC is powered off. U.S. Pat. No. 6,129,569 issued Oct. 10, 2000 to Fernandez, entitled “Electrostatic Discharge Protection Device for Coaxial Systems” describes a cable discharge device which mounts to a coaxial connector. Its mechanical structure allows the cable to be momentarily grounded while the cable is advanced toward the connector. However, once the cable is inserted into the connector, it cannot be discharged again. Such device does not allow the cable to be discharged after plugging it into the chassis. ESD related damage can result if static charge builds up after the cable is connected.
Accordingly, it would be desirable to provide a cable discharge switch to discharge the cable even after the cable is inserted, such that the cable can be discharged whenever the system is powered down.
IEEE 1149.6 describes rules and testing instructions for testing single-ended cable faults for both AC and DC coupling modes. This publication is not admitted to be prior art. This publication proposes some implementations of a cable fault detector, but they are bulky and some of them are not practical. It is desirable that a cable fault detector not be bulky that it only minimally loads the incoming signal path. Otherwise, jitter increases at the receiver coupled to the incoming signal path.
As a first cable fault detector proposed by IEEE 1149.6, a hysteresis comparator 10 is used for comparing a signal from a single-ended cable to a delayed version of the same signal, as illustrated in FIG. 1. Such cable fault detector has two problems. First, a delay element 12 having a fairly long delay is needed in order to carry out the comparison. Such delay element will be bulky, requiring a large area of the chip. Second, the comparison destroys the hysteresis effect. For AC coupled signal having an RC decay, as described above, when the decay drops to a certain level, the output of the hysteresis comparator 10 changes state. As a result, such cable fault detector, while capable of detecting a shorted AC coupling capacitor, is poorly suited for testing an AC coupled mode, because it does not maintain state when the AC signal decays.
Another cable fault detector 20 proposed by IEEE 1149.6 is shown in FIG. 2. Such cable fault detector is provided for detecting faults in each of a pair of single-ended cables carrying differential signals. Each hysteresis comparator 34, 36 is provided as a combination of two regular comparators 38 and a flip-flop 39 capable of being set and reset asynchronously by the outputs of the comparators and being initialized by an Init Data input on a clock edge provided by Init Clk. The signal from each single-ended cable 24 or 26 is compared to a self-referenced, i.e., low-pass filtered version of the same signal. The advantage of this approach is that no additional reference level is needed. But, considerably high resistance (“R” equal to about 3 kΩ) and capacitance (“C” equal to about 1 pF) are necessary to implement the cable fault detector, requiring large silicon area. Compared to the first cable fault detector (FIG. 1) proposed by IEEE 1149.6, the second cable fault detector is more suitable for testing faults in AC coupled mode, since it latches the state after detecting a signal edge. The RC decay of the signal does not cause the state to change, since it does not rely upon detecting the signal edge. Such cable fault detector also filters out high-frequency noise. However, the resulting test receiver is bulky, and is incapable of testing in DC coupling mode.
A further proposed arrangement for cable DC test is provided by IEEE 1149.6, as illustrated in FIGS. 3A and 3B. In that proposal, a pair of two comparators 138 are provided, both of which are connected to one of two cables which together carry a differential signal pair, of which only one incoming signal A is shown. That proposal is similar to that shown in FIG. 2 except that each comparator compares the signal from a respective cable to a fixed reference level VBIAS, rather than a self-generated reference. The reference level can be the DC common level which is available at the receiver end.
A cable having a defective (short-circuited) AC coupling capacitor is detected by such DC test arrangement as follows. The near end (receiving end) of the cable is initially reset (e.g. discharged to ground) and then permitted to float. At the same time, the output C of the flip-flop 139 is initialized to low by Init Clk, as shown at the EXTEST Capture Window in FIG. 3B. After being reset, a cable having a good capacitor stays at the reset state such that the output of the flip-flop 139 stays low. However, the signal potential A on a cable having a defective, short-circuited capacitor reverts to a nonzero DC voltage. When the nonzero voltage at A crosses the threshold provided by the VBIAS reference level, the signal, it is latched by flip-flop 139 as a digital indicator of the short circuit. In such manner, capacitor short circuits are identified.
Without using the data reset scheme, it is not possible for the cable fault detector to detect short-circuited capacitors using DC test mode. Disadvantages of this scheme include the need to have a large RC component to generate self-reference, and the need to have a reset feature to reset the internal node of the hysteresis buffer latch. In addition, the proposed arrangement does not describe the provision of separate threshold levels for input to the comparator for DC mode and AC mode tests. Since signal levels are quite different for DC mode and AC mode tests, threshold levels should be set differently in order to reduce the effect of noise on comparator operation.